1. Field of the Invention
This invention relates to an improved system to facilitate making engineering wiring changes among semiconductor chips supported on a common multi-layer substrate, and more particularly, to a chip interposer that facilitates the use of direct jumper wires for making engineering change connections.
2. Description of the Prior Art
As will be appreciated by those skilled in the art and, as explained in U.S. Pat. No. 4,803,595 assigned to the assignee of this application, current packaging technology mounts a number of integrated circuit chips on a common substrate that interconnects the chips with each other and to input/output pads.
Such substrates normally are constructed of layered ceramic sheets (so-called green sheets) having thousands of vias and printed wiring lines that form the internal circuit network. After the substrate has been laminated and sintered, there is no practical method of changing the buried internal network. However, it becomes necessary quite frequently to modify the internal circuitry to (1) correct defective lines and/or vias and (2) make changes in the basic circuitry to accommodate design changes, to upgrade the package, or modify it by the use of different devices or the like.
A number of engineering change (EC) schemes have been developed to modify the interconnection network between chips; i.e., to disrupt the unwanted part of a network and to substitute a replacement network part. In known schemes, the network disruptions and replacements are accomplished through the use of "fan-out" networks with or without EC pads that are physically located in spaces between the chips on the surface of the substrate on which the device chips are mounted.
There have also been proposals in the prior art to facilitate making engineering changes by means of a so-called interposer module. That is, a wiring module for each chip that is interposed between the chip and multi-chip module. Here, a chip is electrically and mechanically connected to the top surface of the interposer module by solder bumps and the lower surface of the interposer is similarly connected to the multi-chip module. Prior art interposer modules have wiring layers and via chains formed by the same, or similar technologies, that are used to manufacture the multi-chip module itself. The wiring layers of the interposer module provide wiring patterns that can be used to reroute connections in accordance with desired engineering changes including changes in the connections between chips on the module. Prior art technology for making engineering changes by rerouting connection paths is described in U.S. Pat. No. 4,489,363, also assigned to the assignee of this application. The aforementioned U.S. Pat. No. 4,803,595 discloses an exemplary prior art interposer.